1. Field of the Invention
The present invention relates to a semiconductor chip-embedded substrate, and to a method of manufacturing same.
2. Description of Related Art
Conventionally, in manufacturing a packaged substrate, for example, semiconductor chips are mounted on a substrate. In mounting chips, a single chip may be mounted, or plural chips may be mounted to form a package. In any event, however, no attempt has been made to embed chips into a substrate.
In recent years, as the performance of electronic apparatus using semiconductor devices such as semiconductor chips has become higher and more elaborate, it is increasingly required to improve the packaging density of semiconductor chips and to reduce the size and footprint of a substrate having semiconductor chips mounted thereon. In order to meet these requirements, various substrates having semiconductor chips embedded, so-called chip-embedded substrate or semiconductor device, has been proposed.
In JP 2001-332643 A, for example, a semiconductor device is disclosed which is obtained by disposing a plurality of semiconductor chips on a dicing frame, forming a patterned resin film (protective film), and, after rerouting lines, posts (pillar-like protrusions) and a second protective film are formed, performing dicing to form a multi-chip module.
In JP 2003-318323 A, a semiconductor device is described which is manufactured by adhering a plurality of semiconductor chips to a base plate and, after an insulating layer, a rerouting layer, protruded electrodes and solder balls are successively formed, removing the base plate and cutting the insulating layer between the chips.
In JP 2001-217381 A, a packaged semiconductor device is described where a plurality of semiconductor chips are placed on a mounting jig, copper posts are formed on each semiconductor chip and, after the chips are sealed with sealing resin, a rerouting layer with lands is formed, copper posts are formed on the lands and rerouting layer is sealed with sealing resin, a solder ball is formed on the exposed copper post.
In JP 2002-170827 A, a technology for manufacturing a printed wiring board is described in which semiconductor chips having a transition layer located on a die pad are placed in concavities provided in a core substrate.
In JP 2001-15650 A, a method for manufacturing a ball grid array (BGA) package is described where an IC chip is joined to a metal heat sink, a plurality of insulating resin layers are formed to cover the IC chip and mounting pads of the IC chip are connected to BGA mounting pads formed on the surface of the uppermost insulating resin layer.
In JP 2002-9236 A, a multilayer semiconductor device and a method of manufacturing same is disclosed in which a circuit board is constituted by arranging a film type semiconductor package having a semiconductor chip embedded to a package-accommodating hole of a wiring layer and a multilayer semiconductor device is formed by stacking plural circuit boards and electrically interconnecting the wirings of respective circuit boards.
As described above, various chip-embedded substrates and manufacturing method thereof have been proposed in order to meet requirements such as high density packaging of semiconductor chips on a substrate, miniaturization and space-saving of substrates having semiconductor chips mounted thereon, and the like. However, in order to meet these requirements, which will certainly increase in future, the development of chip-embedded substrates with higher packaging density of chips, which affords further miniaturization and higher reliability, is indispensable. To date, no satisfactory chip-embedded substrate has been known.